HDL

  • describe hardware

  • gate level, switch level, behavior level, register transfer level

  • fpga multiple components parallel

  • RTL pseudocode for hardware, some abstraction

  • registers (sequential logic), as D flip flops, only one with memory

  • combinational logic (stateless, pure function)

  • sequential logic = finite state machine

  • wire vs. reg

https://numato.com/kb/learning-fpga-verilog-beginners-guide-part-2-modules/

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Kevin Chow
Kevin Chow
Fledging Computer Scientist
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